Only when you design with unportable IP which the FPGA vendors are dying for you to design in. Some proprietary things like clock multipliers are unavoidable but they can be isolated in portable wrappers. Most FPGA devs are not this forward thinking and lock designs into a platform that makes future migration a problem. No different than writing code against Win32 vs Posix.

It is quite routine for ASIC development to prototype on FPGAs and that code will necessarily be made more portable to accommodate the architecture changes an ASIC requires.