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A comment on Intel CPUs impacted by new PortSmash side-channel vulnerability. Parent comment

Re:Intel CPUs impacted by new PortSmash side-channel vulnera... by mbell on Friday November 02, 2018 @05:06PM (#18366755)
Is this not a problem with, for example, L3 cache that is shared across cores? Is there something inherent about it that makes timing attacks impossible or is it just that we're seeing people go after lower hanging fruit?
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Re:Intel CPUs impacted by new PortSmash side-channel vulnera... by throwaway2048 on Friday November 02, 2018 @10:47PM (#18368380)
Cache timing attacks are definitely a real thing, but cache can at least be isolated/partitioned (even if its not really currently).
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