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Re:Open source RISC-V implemented from scratch in one night by craftyguy on Tuesday August 28, 2018 @10:08PM (#17864815)
> Writing RTL takes one night but, how long will the verification take?

Obviously more than a night, but hey development is completely open so you can see for yourself.

> How much will it take to tapeout?

0 days. It is running on an FPGA.

> Who will pay for it?

See previous comment. Presumably the author paid for the FPGA, but maybe it was a gift?

Re:Open source RISC-V implemented from scratch in one night by samsoniuk on Thursday August 30, 2018 @02:22AM (#17874482)
Almost! For most of time I work only in the simulator (Xilinx ISIM), but luckily I have lots of FPGA boards available at work too!