Building a More Secure World with the RISC-V ISA

Re:Building a More Secure World with the RISC-V ISA by vardump on Sunday January 07, 2018 @06:53AM (#16090500)

Nineties probably wants its CISC vs RISC fight back.

Nowadays it just doesn't matter, because CPUs translate ISA into whatever they please.

Cache and out of order buffers (speculation) is what is behind latest security issues.

[ Parent | on HN ]

Re:Building a More Secure World with the RISC-V ISA by ant6n on Sunday January 07, 2018 @08:45AM (#16090824)

> Cache and out of order buffers (speculation) is what is behind latest security issues.

That's one way to look at it. Another is that opaque CPU designs are a big issue (at least for meltdown, which is a bug; spectre is more of a broken design philosophy).

[ Parent | on HN ]

Re:Building a More Secure World with the RISC-V ISA by snvzz on Sunday January 07, 2018 @07:22AM (#16090602)

>Nowadays it just doesn't matter, because CPUs translate ISA to whatever they please.

Doing that comes at a cost, which compounds the complexity already added by merit of being CISC in the first place.

[ Parent | on HN ]

Re:Building a More Secure World with the RISC-V ISA by vardump on Sunday January 07, 2018 @08:01AM (#16090723)

Larger code size is not for free either.

Besides, this translation layer is not a major source of complexity anymore. Even instruction decoding in x86 is not a big deal anymore.

[ Parent | on HN ]

Re:Building a More Secure World with the RISC-V ISA by snvzz on Sunday January 07, 2018 @09:41AM (#16090980)

>Larger code size is not for free either.

What larger code size?

RISC-V is no worse than x86-64.

Refer to: https://riscv.org/wp-content/uploads/2016/07/Tue1130celio-fu...

[ Parent | on HN ]

Re:Building a More Secure World with the RISC-V ISA by vardump on Sunday January 07, 2018 @10:16AM (#16091096)

That's a nice property for sure. Typically RISC ISAs have had larger code size.

Being a new ISA, RISC-V does have an advantage of being able to learn from past mistakes.

[ Parent | on HN ]

Re:Building a More Secure World with the RISC-V ISA by snvzz on Sunday January 07, 2018 @10:20AM (#16091108)

Simple vs Complex, but same code size. An easy win for simple.

It's very nice, indeed. Unlike the established RISC ISAs, this one's created with decades of RISC (and CISC) experience to draw from.

I'd of course still have my doubts whether this is going to draw any traction, if it wasn't for the list of RISC-V Foundation members.

[ Parent | on HN ]

Re:Building a More Secure World with the RISC-V ISA by microcolonel on Sunday January 07, 2018 @03:02PM (#16092365)

I think you somewhat underestimate the complexity introduced by decoding x86, and working with the resulting μ-ops.

[ Parent | on HN ]

Re:Building a More Secure World with the RISC-V ISA by dbcurtis on Sunday January 07, 2018 @11:34AM (#16091384)

Today there is a benefit from the higher code density of CISC. 1. Less memory bandwith expended moving instructuons into I-cache. 2. Less die area spent on I-cache per unit of "code functionality", however you mesure that.

RISC only made sense when logic cycle times, memory cycle times, and I/O cycle times were at rough parity.

[ Parent | on HN ]

Re:Building a More Secure World with the RISC-V ISA by snvzz on Sunday January 07, 2018 @12:02PM (#16091510)

If you read the rest of the thread, you'd find that both of your points are moot, as RISC-V code density is no worse than x86-64.

As for your claims on RISC not making sense, I'll just say it makes more sense than ever, as complexity leads to issues, which could affect security, and security is important in the present networked world.

[ Parent | on HN ]