Unless process is temporarily stopped by OS which has saved all registers in RAM so that process can be continued afterwards.
Registers may be stored to RAM (though there are often local register files in the CPU). If you're on a modern x86 platform, you may have encrypted memory support.
For Intel, look up SGX. For AMD, look up SEV. Each of these is way more secure than reliance on registers as secure scratch memory.
Re:RAM-less Buffers
by physguy1123 on Monday January 01, 2018 @01:29AM
(#16044998)
SSE registers will never get stored to ram without emitting explicit instructions (or getting an interrupt) to do so on any Intel/amd cpu as far as I know. It can be tricky to deal with such situations, but if you have a stretch of code where you can stop that registers can be used to hide data from memory.
Re:RAM-less Buffers
by kindfellow92 on Monday January 01, 2018 @03:12AM
(#16045217)
Yeah on context switch the SSE registers are stored in memory, so this doesn’t help for security.
Re:RAM-less Buffers
by physguy1123 on Monday January 01, 2018 @09:58AM
(#16046259)
That's why I said it's tricky to deal with interrupts, but possible if the effort is worth it to the use case. One could run the code in a kernel module which masked interrupts or use restartable sequences and cleared sse in the kernel when in certain code sections.
https://en.wikipedia.org/wiki/TRESOR