Re:EC2 Bare Metal Instances with Direct Access to Hardware
by paulie_a on Wednesday November 29, 2017 @09:24AM
(#15806958)
Can you please just post the info. Intel deserves to be shamed
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Re:EC2 Bare Metal Instances with Direct Access to Hardware
by khuey on Wednesday November 29, 2017 @10:56AM
(#15807743)
One of the things the performance monitoring unit (PMU) is capable of doing is triggering an interrupt (the PMI) when a counter overflows. When combined with the ability to write to the counters, this lets you program the PMU to interrupt after a certain number of counted events. Nehalem supposedly had a bug where the PMI fires not on overflow but instead whenever the counter is zero. Xen added a workaround to set the value to 1 whenever it would instead be 0. Later this was observed on microarchitectures other than Nehalem and Xen broadened the workaround to run on every x86 CPU. Intel never provided any help in narrowing it down and there don't seem to be official errata for this behavior too.
This behavior is ok for statistically profiling frequent events but if you depend on exact counts (as rr does) or are profiling infrequent events it can mess up your day.
https://lists.xen.org/archives/html/xen-devel/2017-07/msg022... goes a little deeper and has citations.
Re:EC2 Bare Metal Instances with Direct Access to Hardware
by voidmain0001 on Wednesday November 29, 2017 @10:40AM
(#15807592)
Is this what khuey is referring to?: https://support.citrix.com/article/CTX136003