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A comment on Western Digital Plans to Ship More Than One Billion RISC-V Cores a Year. Parent comment

Re:Western Digital Plans to Ship More Than One Billion RISC-... by pkaye on Tuesday November 28, 2017 @04:31PM (#15801967)
RISC-V benefits is mostly an open source license that is free of patents. I think the biggest reason for it is academic... there needs to be an open platform for academic research. I'm sure it is next to impossible for an average university to do that on ARM or x86 architecture.
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Re:Western Digital Plans to Ship More Than One Billion RISC-... by jstewartmobile on Tuesday November 28, 2017 @04:41PM (#15802073)
Were there any academic obstructions to OpenRISC or OpenSPARC?
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Re:Western Digital Plans to Ship More Than One Billion RISC-... by anderspitman on Tuesday November 28, 2017 @05:07PM (#15802308)
https://riscv.org/2014/10/why-not-build-on-openrisc/
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Re:Western Digital Plans to Ship More Than One Billion RISC-... by nabla9 on Tuesday November 28, 2017 @04:50PM (#15802162)
RISC-V is just ISA. I don't think ISA's can be patented. Just some specific instructions.
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Re:Western Digital Plans to Ship More Than One Billion RISC-... by pkaye on Tuesday November 28, 2017 @04:57PM (#15802230)
Yes, they did the research for prior art to make sure that is the case for their instruction set.
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Re:Western Digital Plans to Ship More Than One Billion RISC-... by kindfellow92 on Tuesday November 28, 2017 @10:43PM (#15804390)
ISAs can be patented. Intel is patenting their latest AVX/SSE instructions.
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Re:Western Digital Plans to Ship More Than One Billion RISC-... by hajile on Wednesday November 29, 2017 @08:22AM (#15806519)
ISA spec is copyrighted. Instructions aren't patented directly. Instead, the best ways of implementing them are patented.
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Re:Western Digital Plans to Ship More Than One Billion RISC-... by kindfellow92 on Wednesday November 29, 2017 @04:24PM (#15810998)
Seems like Microsoft is potentially being targeted for writing an x86 emulator https://newsroom.intel.com/editorials/x86-approaching-40-sti...
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