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Re:Mill CPU Inter-Process Communication by dirkt on Monday October 09, 2017 @09:48AM (#15433726)
It's an interesting question, maybe ask at the Mill forum: https://millcomputing.com/forum/the-mill/

Based on my limited understanding of the Mill I'd say (1) (simple_ PHIs are implemented by the pick-phase, (2) it's an exposed pipeline with known latencies, so you can't really have the "I want to avoid the longer latency inside a single basic block", and it's probably not worth doing that for a single mult vs. a single add, (3) for cases where it matters because the latency difference is much better, you'd use two basic blocks, and rearrange belt positions at the end.

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