I've coded in vhdl and verilog. Working at the gate level is definitely more functional in nature and has the same problem (it's not obvious intuitive how the code you write maps to gate logic). Hence, why novices introduces accidental latches and metastability. I've actually used clash for one non-trivial project, and there's something interesting there for sure.

See also https://www.youtube.com/watch?v=k02mEtPfdaQ