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A comment on An FPGA-friendly 32-bit RISC-V CPU implementation. Parent comment

Re:An FPGA-friendly 32-bit RISC-V CPU implementation by dang on Thursday July 20, 2017 @04:34PM (#14816056)
Yikes. Personal attacks aren't allowed here and we ban accounts that do that, so please don't do that again. Your comment would be just fine if it were just the middle paragraph.
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