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A comment on The Mill CPU Architecture: Switches [video]. Parent comment

Re:The Mill CPU Architecture: Switches [video] by mozumder on Thursday July 20, 2017 @04:15AM (#14810804)
Intel has also learned from each generation.

CISC is very efficient. They do the most ops per transistor.

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Re:The Mill CPU Architecture: Switches [video] by naasking on Thursday July 20, 2017 @12:48PM (#14814123)
But Intel is constrained by backwards compatibility.

"CISC is very efficient" is a meaningless statement. The specific instruction set and its implementation is or is not efficient.

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