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A comment on The Mill CPU Architecture: Switches [video]. Parent comment

Re:The Mill CPU Architecture: Switches [video] by Veedrac on Wednesday July 19, 2017 @06:15PM (#14808497)
> In theory Skylake can deliver ~8uOPs per cycle in parallel.

4 µop/cycle after fusion.

http://www.agner.org/optimize/blog/read.php?i=650

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