Re:16nm ARMv8 SoC for servers and workstations
by m-j-fox on Friday June 16, 2017 @09:24PM
(#14573765)
8 DDR channels. Seems like everyone putting 30+ cores on a chip needs to learn this lesson. Memory bandwidth is the bottleneck. Intel uses HBM stacked on the Xeon Phi. Anyone who has the capability should do likewise or maybe try 8 DDR channels, pin count be damned.
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Re:16nm ARMv8 SoC for servers and workstations
by awordnot on Friday June 16, 2017 @10:26PM
(#14573954)
This is what AMD's new Epyc server CPUs are rumored to have.
Re:16nm ARMv8 SoC for servers and workstations
by sliken on Friday June 16, 2017 @10:58PM
(#14574038)
Quite more than a rumor at this point. The Eypc has 4 Ryzen dies, each of which on an on chip 2 channel memory controller.
http://www.amd.com/en-us/press-releases/Pages/amd-raises-exp...