Re:Program FPGAs with Go
by jnordwick on Tuesday June 13, 2017 @10:00PM
(#14550212)
In my experience although limited most software developers write terrible HDL code. They think too serially, step wise, and aren't very good at parallelizing their code on the level necessary for good hardware design.
The exception to this are those with good hardware sympathy. They can after carry over that detail oriented thought process.
The exception to this are those with good hardware sympathy. They can after carry over that detail oriented thought process.