And last time I checked into it, neither has much to do with 7 or 10 nanometers. The 'feature sizes' of old are not actually on that scale, rather it's more a measure (read: marketing speak) of resolution than of feature size at this point? I still can't get good answers. As a biologist used to working with objects that actually do have features on the order of 0.1nm, and volumes with less than <5nm per side, I'm trying to figure out just how big these transistors really are to fit into my existing mental models. At what point do the transistors actually have to start dealing with (can they deal with) quantum/thermal/structural effects of being so small.

> At what point do the transistors actually have to start dealing with (can they deal with) quantum/thermal/structural effects of being so small.

I think that was about a decade ago. These things simply cannot work if they ignore the quantum effects at their size.

I guess the better way to ask is when do those effects dominate rather than merely effect. At what point do structure and feature type need to actually change?

I'm assuming Samsung and TSMC follow the same convention? So what does Samsung's 14nm chip map to in Intel's dimensions?