A factor of 360 is closer than I would have guessed. But that's still at least 8 doublings of compute efficiency. We've never had concrete roadmaps that far out—that would be like scheduling the introduction of FinFETs while Pentium 2s were first hitting the shelves. Nobody's ever been able to predict that far in advance which fabrication technologies will end up being economical at scale and required at which node. (Just look at how well the industry has coped with having to put off EUV so many times.) With the looming end of silicon scaling, those thermodynamic limits certainly don't look any less out of reach.