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Re:X86 Register Encoding by lisper on Tuesday November 01, 2016 @05:27PM (#12850183)
This. In today's world it is easy to support multiple instruction sets in the same silicon using the same registers and ALU. So why in the name of all that is holy does the x86 not have a nice clean 64-bit instruction set that you can swap in? It's all RISC under the hood anyway, why not give us access to it? The only explanation I can think of is that Intel wants to keep things complicated as a barrier to entry for competition.
Re:X86 Register Encoding by pcwalton on Tuesday November 01, 2016 @06:32PM (#12850711)
> It's all RISC under the hood anyway, why not give us access to it?

Presumably because it doesn't matter that much, so it isn't worth the investment for Intel.

It feels to me like people have trouble accepting that both of these are true: (1) RISC vs. x86 doesn't matter that much in practice; (2) technically speaking, RISC is a superior design to x86.

Re:X86 Register Encoding by nullc on Tuesday November 01, 2016 @07:44PM (#12851159)
> Presumably because it doesn't matter that much, so it isn't worth the investment for Intel.

Intel invested in a new instruction set (IA64). AMD did not.

The market chose AMD's offering.

Re:X86 Register Encoding by pcwalton on Tuesday November 01, 2016 @08:54PM (#12851477)
And the market also chose ARM's AArch64 instruction set, despite the ARM installed base being wider than x86 and a backwards incompatible break from the past. The secret? Supporting both ISAs and switching instruction sets on exceptions.

The lesson I take from history is that there is no need to maintain ISA compatibility as long as the old mode is accessible on a process level.

Re:X86 Register Encoding by imtringued on Wednesday November 02, 2016 @03:34AM (#12852892)
>The secret? Supporting both ISAs and switching instruction sets on exceptions.

The secret is that Apple controls their hardware/appstore and android apps are ISA independent.

Re:X86 Register Encoding by adrianratnapala on Wednesday November 02, 2016 @06:16AM (#12853392)
Whot?

Didn't the AMD64 architecture spank Itanium in the marketplace long before the iPhone became a big deal?

Re:X86 Register Encoding by qb45 on Wednesday November 02, 2016 @08:44AM (#12854089)
> It's all RISC under the hood anyway, why not give us access to it? The only explanation I can think of is that Intel wants to keep things complicated as a barrier to entry for competition.

It wasn't Intel but AMD that came up with x86-64. Intel (and HP) indeed wanted to give you a clean 64-bit design - Itanium. And yes, it was meant as a barrier to entry among other things. But AMD won because Itanic didn't run existing x86 software and generally turned out to be slower than Intel hyped.

As for the internal RISC, you won't get it because it changes from generation to generation (also between vendors) and these changes are part of why x86 keeps getting faster. Furthermore, AFAIK these internal ops aren't as dense as x86 to make them simpler to decode and fetching them from memory would make bandwidth more of a bottleneck.

Re:X86 Register Encoding by gsnedders on Tuesday November 01, 2016 @06:23PM (#12850636)
Related to this is the PPC615, an IBM project in the mid-90s, socket compatible with the original Pentium, and ran x86-32, PPC32, and PPC64 natively. (It got scrapped because all the signs looked like Intel was going to push IA-64 heavily, and rely on it's backwards compatibility for x86-32, hence an expectation x86-32 was soon to be legacy.)
Re:X86 Register Encoding by setpatchaddress on Tuesday November 01, 2016 @11:27PM (#12852043)
Do you have a reference for that? I've heard various things about the 615, one of which was that it wasn't ever a real project.