Re:IEEE P802.3bz Approval for 2.5G/5G Ethernet
by j-walker on Tuesday October 04, 2016 @12:18PM
(#12636614)
At last year's DesignCon there was a lot of talk about switching to PAM-4 encoding versus the now-standard NRZ. This would almost double the bandwidth given the same clock speed.
NRZ encoding means on a clock tick you either get a 1 or a 0. With PAM-4 a clock tick can be a 0,1,2,or 3.
Re:IEEE P802.3bz Approval for 2.5G/5G Ethernet
by stephengillie on Tuesday October 04, 2016 @03:16PM
(#12638475)
This sounds similar to MLC in SSD. And both feel like a step back towards analog computing.
Essentially, I guess that is treating the wire as a capacitor, and asking how many times per second an ASIC can detect if it's at a positive (1) or negative (0) voltage - for LVDS at least.