I keep telling OSS HW people to build on OpenSPARC given you have an ASIC-proven, badass design to start with. Good to see that they not only did that but put 25 cores on a 32nm node. We have Raptor trying to get OpenPOWER for a more open processor, RISC-V designs in the making for multi-core, and the RTL of a fully-open SPARC with 25-cores ready to go. We also have a need for high-performance, multi-core CPU's as our root of trust. Anyone see opportunity? ;)

Next step for any academics reading is modifying these suckers to have extensions like Watchdog[Lite] or CHERI CPU's. Dover is already doing SAFE with RISC-V. FreeBSD already runs on CHERI, though, so hardest work is done. Modify OpenSPARC & compiler backend for it as they did their BERI MIPS. Add I/O MMU & trusted bootloader. Boom! The beginning of a secure, open SOC. :)