So, a couple days ago I shared a Makefile with John, meant to become the standard Go project Makefile at CloudFlare. Here are the comments:

> John: This is very expensive. Can't it be calculated once (:=)?

> Me: The problem is that we don't want to calculate it if we don't need it, because we might run make before go is installed, and that would fail.

> John: http://blog.jgc.org/2016/07/lazy-gnu-make-variables.html

I think he wrote this piece to answer my question.

That's working with great people right there.

Well, it was nice of him to send you a blog link, rather than telling you to buy his book, which mentions this exact trick :)

https://www.nostarch.com/gnumake

Many of the things in my book are on line in different places. The technique I use in the book is here: https://www.cmcrossroads.com/article/makefile-optimization-e... It uses a different technique and requires replacing $(FOO) with $(call cache,FOO) everywhere.

The book comprises everything I've written about GNU make edited, rechecked and cleaned up with additions to cover new GNU make features and a couple of other things I hadn't written before.

If you start asking him too many questions he does eventually just throw the book at you (albeit a free autographed copy).

Yes, that's what happened. I was thinking about your response and left it in my inbox to respond to. Figured I'd write something up for public consumption instead and as I'd done it differently in my book figured a blog post was appropriate.

This is a fundamental part of Make. If it's news to anybody, PLEASE go read the manual. Otherwise we will keep getting more and more new systems that supposedly improve Make, written by and for people who never bothered to learn how to use Make.

Make can't decide whether it's a dependency graph or a macro language. That leads to weird semantics like this.

That's why I like ASDF3: it manages dependency graphs with a superlative macro language not of its own design.

Make is a dependency graph with macroes for not having to repeat, copy-and-paste, and hard-code stuff.

You have rough corners in every language. Make is actually quite good (meaning: easy to read, without much gymnastics) in its typical use case of compiling a software project. The post was written specifically to explore one of these rough corners everything has.

Reading it may be easy, but every time I've tried to use make (i.e. write a Makefile that does what I want) I've found it to be composed almost entirely of rough corners.

Yes, and I've purchased and read books, and I've read online resources. Granted, none of this has been within the last several years, so if there have been major changes in that span I've missed them.

But thanks for the charitable question!

Whoa. This is NOT a rough corner. It is a fundamental part of the language. Deferred variables are akin to functions in other languages, while immediate ones are more like variables in other languages.

Did you read the whole article? This technique doesn't appear in the manual at all and I've read it quite a few times. If it was so fundamental why is it so awkward to construct?

Still learning things about GNU make after 20 years. Great software.