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A comment on An emulator for a single-instruction (NOR) CPU.

Re:An emulator for a single-instruction (NOR) CPU by adamnemecek on Friday June 24, 2016 @11:10PM (#11975017)
This might be of your interest https://en.m.wikipedia.org/wiki/One_instruction_set_computer
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Re:An emulator for a single-instruction (NOR) CPU by TazeTSchnitzel on Saturday June 25, 2016 @01:48PM (#11977206)
Also: https://github.com/xoreaxeaxeax/movfuscator (which makes x86 single-instruction)
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Re:An emulator for a single-instruction (NOR) CPU by edwintorok on Saturday June 25, 2016 @05:44PM (#11978133)
How about computing with 0 instructions? (aka Intel MMU's fault handling is Turing complete): https://github.com/jbangert/trapcc
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Re:An emulator for a single-instruction (NOR) CPU by 235337 on Saturday June 25, 2016 @04:37PM (#11977881)
Totally off topic, but i want more of his cantor dust!!!
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Re:An emulator for a single-instruction (NOR) CPU by chriswarbo on Saturday June 25, 2016 @02:32PM (#11977390)
Also https://esolangs.org/wiki/OISC
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