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A comment on An emulator for a single-instruction (NOR) CPU. Parent comment

Re:An emulator for a single-instruction (NOR) CPU by edwintorok on Saturday June 25, 2016 @05:44PM (#11978133)
How about computing with 0 instructions? (aka Intel MMU's fault handling is Turing complete): https://github.com/jbangert/trapcc
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