Re:Reimagining the future of routers
by Cerium on Wednesday June 08, 2016 @10:06AM
(#11862328)
I wouldn't say that they easily reach 10g on small packets. I got to about 8g before I started to have trouble. It certainly takes some optimization. If I remember correctly Intel's DPDK documents warn that you only have about 80 cycles between packets.
[ Parent
| on HN ]
Hmm, for our case I 'program' flows which then end up being used by per-core tasks for forwarding decisions, and with couple of tweaks etc was able to handle line rate across 4 10g interfaces for 64b packets, with one physical core per port.
This is on bare metal though, so might be different experience if you are running stuff on vm's where without sr-iov you would have multiple layers of indirection + context switches before someone can actually do something meaningful to the pdu...
edit: slight clarification added