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As far as I can tell Pat Gelsinger has not changed anything. The same hacks who ruined Intel are all still there, moving up the managerial ranks. Makes sense because Pat came from that culture… he practically defined it.
This toxic environment might still be going on now if Intel maintained their process advantage… the 10nm debacle exposed the design/arch teams: their people-manager emperors had no clothes.
I left a year after that... tbh don't see things getting any better from talking to friends. We'll see.
The metrics that matter financially are performance/power and performance/area, and Intel is worst-in-class in both metrics in both CPU and GPU right now.
I worked in chip design at Intel for over a decade. In the 2016 culling, I noticed they laid off a ton of smart people, but all the terrible management and fake-it-til-you-make-it engineers survived. I left very soon afterwards. I suspect the 2022 massacre will be along the same lines. Intel as an organization is not just finished, it is terminally toxic and incapable of being fixed.
I worked in Pat's org years ago and neither he nor his lieutenants had any talent other than fighting Intel political battles.
Until Intel has a p-core that isn’t grossly obese, they have no option but to spam e-cores just to make powerpoint slides.
The takeaway from the story: connecting a bunch of shitty chiplets together makes a shitty SoC. Except this time, Intel paid TSMC a buttload of money to make their shitty design.
Not a single second of thought is ever spent by the architects/designers on optimizing “absolute performance”. We only care about perf/area and perf/watt. It is the marketing teams that try to hype up gamer performance. Overclocking/high voltage performance requires the engineering knowledge of a freshman intern: go raise the voltage/freq, run the test program, make a SKU.
Source: worked on CPU/GPU arch/design for 20 years, including at Intel.
TSMC also has extensive experience with these machines compared to Intel.
Pat is just making shit up and hoping their stock price doesn’t crater even more.
So they are going to rest and vest. They all know Intel is finished but the short term bump in pay is quite attractive for people who want to take a break.
- The Sapphire Rapids validation catastrophe proves they haven’t learned a damn thing about high quality first silicon even after all these years of getting their asses handed to them by AMD/Apple on fast cadence updates.
- Arc, enough said.
Pat Gelsinger made some big moves on his direct reports but he doesn’t have the time to perform the necessary mass purge of the mid/mid-high level management (i.e. the baby VP tier). When you run a company with 100k staff you have to delegate a lot of things, but the problem is a huge amount of the toxic management are still there, hiding in nooks and crannies and surviving.
Intel is currently throwing a lot of money around to hire people from the companies thrashing them (got a text message from a VP a couple months back), I get the feeling the Intel immune system will spit them back out upon detecting deviance from “the Intel way”.
what outsiders don’t realize is intel management never had to deal with competition. they spent their entire careers fighting each other in petty internecine political battles. if you think intel vs amd is a feud, you haven’t seen intel arch/design vs intel fabs. and in that kind of environment, loyalists and politicians are promoted, not people willing to critically inspect your own processes and improve things.
end result: intel has a massive competence gap. in the extremely unlikely scenario where intel can regain the process lead, they will still be behind the curve on innovation and execution.
For whatever reason, Intel called this mechanism “marbles”. There are a bunch of names in the industry for this: PRF, arch pointers, etc… its all the same thing.
By the way, moving to arch pointers is precisely what adds additional work on retirement: you need to do a walk or checkpoint restore to revert the arch state back to where it needs to be. With P6/Tomasulo, it is free. You got it backwards.
Any talk of Intel beating Apple/AMD in "performance" while being behind in process technology is ignorant of the engineering metrics that really matter in the industry, as well as the actual impact of process shrinks in the year 2022.
Go compare the perf/power curves of the alder-lake cores (both P/E) versus the last-gen Apple cores from TSMC n7+. TSMC n7+ is roughly comparable to Intel 10nm ESF in transistor performance, so it is a fair comparison.
Do your research then get back to me about how the process is entirely responsible for every perf/power difference and we (the silicon design teams) are just identical robots doing the same thing across the board in every company.
I do like how you claim there is no design magic sauce, but then Apple will lose big when Intel/AMD come out with their 5nm equivalents, as in, they found some magic sauce? WTF?
Nobody in CPU design cares about unconstrained power performance. Even at Intel, they never use the PL2 power level as the design landing zone. All modeling is done at much lower power target, even below PL1.
That is to say: unconstrained power performance is not an engineering effort, it is a marketing and SKU differentiation effort. Your “more powerful” statement is a matter of how much power Intel/Apple/AMD/whoever is willing to shove into their piece of silicon, which in turn dictates the form factors and customers they can try to satisfy.
Apple only needs a few watts per big core and still get the peak perf it needs, and put that chip in all the form factors it sells. Obviously if M1 sucked down the kind of power as any Intel chip, it cannot go into an iPad, or a fanless macbook air, without totally compromising performance.
Intel on the other hand needs grossly more watts to hit that same performance, and therefore is losing badly on form factors that care about power: laptops and servers. Some form factors/customers just don’t care, which is why Intel cooks up marketing targeting the gamer market, or the 8-pound laptop market. That’s all fine, just don’t pretend Intel is not getting absolutely hammered on the CPU technical specs for the money-making markets that matter.
BTW, the DIY gamer CPU market does not matter. The 8-pound laptop market does not matter.
That is because there is a huge design gap. Intel architecture and design teams have always assumed on the inevitability of their own manufacturing superiority and process advantage and thus never had to really consider where to place transistors for the most benefit, or think really hard on better ways to improve single-thread performance instead of just turning a knob that was invented two decades ago.
In any case, your statement is just plain wrong. Dennard scaling has been dead for a decade now. Planar area decreases with new processes come with increased power density, i.e. new process nodes reduce die sizes but the transistor performance does not improve the way they used to.
source: worked at Intel for CPU design for a decade, then worked on the same things elsewhere using TSMC process
Intel was very clear that it was not willing to pay top dollar not because they didn’t have the money, but because top technical talent tended to resist or reject Intel culture. This meant the big bucks always went to management and other enforcers of said culture.
In 2021 Pat Gelsinger told HR to increase pay to match market in an attempt to stanch the attrition. The problem with this is that Intel management didn’t try to fix the broken culture, and instead propped it up by handing the new cash over to the “critical talent” that again, were the cultural enforcers. Pat G genuinely believes Intel is the greatest company on the planet, so he won’t see this as a problem.
There are some things that money can’t fix.
One of these days the demise of Intel will be taught in business schools as a case study of how to destroy a tech company from within.
Mostly incompetence.
That is one of the reasons Intel was able to get away with their garbage in-house EDA tooling and processes. Intel was also able to get away with delays to fix their bugs (due to awful validation methodology).
Even if Intel process catches up TSMC, they would have fix their design tooling, hire talented engineers and get rid of the entrenched hacks who built their careers on mediocrity.