m1333

Phone from 2009 uses SLC, or MLC with large SLC cache, thus capable of at least 10k FDW (full disk writes).

Modern phones typically use TLC or QLC within a inch of their physical limits (signal to noise ratio), thus qualified typically only up to 500 FDW, which translates into several years of use.

There are other mechanisms at play which further degrade this number, such as WAF (write amplification) and others

> take two clock cycles to complete an addition.

How does the clocking work exactly? The circuit is fed A and B and up down up down clock and then the output appears? How does the consumer (circuit) know when to read the result? Is there a "result is ready" flag? How long does the result stay stable? One full clock cycle? So many questions...

EMMC in phones has a finite lifetime and dies after a few years of use. That it is not mentioned in the article tells me everything I need to know about its seriousness