fschutze

Thanks, this is very useful. Reading it I was wondering how applications typically exploit the asymmetric fence, I hope the article you linked help in that regard.

Interesting. You realize this by identifying the offending assembly instructions and then see that one operands comes from memory?

Fantastic article -as always. Regarding the top-down analysis: I was a bit surprised to see that in ~1/5 of the cases the pipeline stalls b/c the pipeline is Frontend Bound. Can that be? Similarly, why is Frontend Bandwidth a subgroup of Frontend Bound? Shouldn't one micro-op be enough?

Can you provide a bit more context why the MCA-Daemon is preferred? Looks interesting, but I don't fully get it.

I realize the Ampere Altra Q features the Armv8.2-a ISA. Does anybody know if there are chips with Armv8.6-a (or above) or even SVE that one can buy? I did some research but couldn't find any.

I never bought used computer parts. Are these parts generally reliable for ~2 years when bought used?

Nice to see a through discussion of such an interesting ISA and chip.

Seems to be a pretty interesting architecture to me. Nevertheless, I always wonder why several of the AI startups (or chip startups in general) make it that hard to try their chips. Would be be that difficult to rent out compute on their chips to try?

Is there a possibility to use the Qualcomm SNPE SDK? I thought this SDK isn't bad. Also, for those who have access to the Qualcomm NPU: Is the Hexagon SDK working properly? Do apps still need to be signed (which i never got to work) when using Hexagon?

Interesting! Does it also work on non-rooted Android devices?