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VitaSetLLC

Re:Hardware backdoors in some x86 CPUs on Saturday August 08, 2026 @04:55PM (#49225828)
> "This is gaming the system, changing the post between this and https://news.ycombinator.com/item?id=49073612 edit for clarity: the submitter kept changing the title and body between this and the linked post. This was the "mistaken duplicate" before."

Bruh, I am not "gaming the system", the CIA (Central Intelligence Agency) is gaming the system.

Gangstalking = "breaking hidden rules" = "Ignorance of the law is no excuse."

How come thinking certain thoughts and having certain opinions and beliefs makes people experience the receiving end of a Sonic Weapon that is a war crime?Also includes: (Undercover or not) law enforcement officers and (private or not) detectives and stupid "vigilanties" committing whatever crimes they want, whether it is harassment through car horn sounds repeatedly emitted near the targeted...

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Why Lattice Semiconductor buying a x86_64 BIOS company shows engineer disrespect

Lattice Semiconductor Corporation once banned the reverse engineering of their FPGA tools and also possibly their FPGA chips, saying:"In particular, no right is granted hereunder […] (3) for reverse engineering a bitstream format or other signaling protocol of any Lattice Semiconductor Corporation programmable logic device." and"You may use any software provided on this website provided that...

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Edit:

It's not like they called you a slur. Just because two States are fighting doesn't mean that a Ukrainian civilian living in Ukraine has to beat up a Russian civilian living in Ukraine because they can't pronounce a Ukrainian word.

I am also Ukrainian, but I do not want my ethnicity to be known for petty violence.

The Internet is completely unusuable when petty content is promoted

Not a day goes by without someone opening a social media website and seeing an unending sludge of petty content.Social Media would sooner show someone a video about how The War of the Bucket was necessary (https://en.wikipedia.org/wiki/War_of_the_Bucket) than say the history of the fine arts.This is because petty content gets users to stay on sites longer despite the users feeling as though...

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VitaSet LLC's planning to add to LLVM's circt to make a FOSS Vita FPGA Compiler

As of the writing of this post, LLVM's circt project has approximately 577,917 lines of code, 207 contributors and began development on March 4th, 2020.We are planning on adding our Vita Programming Language Frontend, Intermediate Representation Optimizations, a Vita Intermediate Representation if deemed necessary, and a backend for the Vita FPGA Architecture to our fork of LLVM's circt...

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Edit: I was 6 years old when I entered first grade. I am 22 years old and I was born on November 6th, 2003. I was 12 when I entered 7th grade and 14 when I finished 8th grade.

As I am suing the FBI, there may be interruptions to VitaSet LLC's operation

This isn't a lawsuit between my former or current LLC v.s. the FBI. This is a lawsuit between me, Vitalii Skikun versus the Federal Bureau of Investigation. If necessary, this lawsuit will be taken to the Supreme Court of the United States of America.Legal Case: https://cps-api.legalmatch.com/pdf/generate-by-account?caseNumber=CC1FUA2QBBD7&accountName=2615600347818CMirror Link that also...

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Also I have applied to ask them to add my project to their NGI Fediversity Fund. Here's what I entered:

1. Proposal Description:

  The Vita FPGA Architecture Subproject is licensed under The VitaSet License.

  The VitaSet License is a permissive license which does not offer any implied warranties and patent grants and does not require the inclusion of this license's text on binary and hardware forms of the source code that is licensed under this license.

  This is to prevent executables and computer chips from wasting resources on including license text, but for source code to keep copyright attribution, so that when source code access gets interrupted, no claim of copyright infringement can be made towards the developers, as the claimant would have the copyright header of this license.

  The Vita FPGA Architecture Verilog files VitaFPGAArchLogicBlock.v and VitaFPGAArchMemoryBlock.v are bugfree.

  Any Vita FPGA Architecture Logic Block can act as though it is an Vita FPGA Architecture Interconnect Block. Thus, any possible truth-table can be expressed with enough Vita FPGA Architecture Logic Blocks, Vita FPGA Architecture Interconnect Blocks and Vita FPGA Architecture Memory Blocks. Thus, any integrated circuit could run on the Vita FPGA Architecture, given enough Vita FPGA Architecture Logic Blocks, Vita FPGA Architecture Interconnect Blocks and Vita FPGA Architecture Memory Blocks are available.
2. Proposal Title:

  Vita FPGA Architecture Chip and Toolchain Investment Proposition
3. Former Contributions to the Open Source Space:

  I am the Founder and CEO of VitaSet LLC.
4. Former and current financial beneficiaries of your project, if any:

  Over $400 have been donated by my relatives to me during late 2023. No other funds have been raised.
5. Are there any open source projects that are similar to yours? List any that you know of that exist.

  https://github.com/efabless/clear - The Open Source FPGA ASIC. A open source Apache 2.0 eFPGA + VexRiscV CPU Chip that only sold a couple hundred physical computer chips before they stopped selling anymore through Tiny-Tapeout. I did not read their source code, my Vita FPGA Architecture was designed exclusively by me entirely from scratch. I have however read the GitHub Issues of the Clear FPGA Project and I see someone asking about the bugginess of the reset circuitry. My Vita FPGA Architecture is bug-free and permissively licensed under an open source license.
6. What Technical Challenges has your project overcome and might overcome in the future? List all that apply.

  Reducing the environmental waste caused by upgrading computer hardware, as simple software updates can be issued to update the FPGA Bitstreams instead of manufacturing new physical computer chips.

  Also, people can take advantage of the Vita FPGA Architecture to code up and use Hardware Accelerated Programs when computer chip transistors stop getting smaller.
7. How compatible is your open source project with the open source ecosystem?

  The Vita FPGA Architecture is synchronous clocked logic with an synchronous reset, so unlike the incompatibility of asynchronous integrated circuits, it will be compatible with the synchronous clocked ecosystem of commercial integrated circuits.
8. Upload your PGP Key (optional):

  https://github.com/VitaSetLLC/VitaSet-LLC-Asymmetric-Cryptographic-Public-Key
Edit: No A.I. was used by me.
Unlike those commercial FPGA companies that haven't open sourced their FPGA Architecture source code, VitaSetLLC has, available on https://github.com/VitaSetLLC/VitaOS-Libre under a permissive open source license.

Also the Vita FPGA Architecture Logic and Memory Blocks are bug-free.

The Vita FPGA Architecture Verilog files VitaFPGAArchLogicBlock.v and VitaFPGAArchMemoryBlock.v are bugfree.