The Spectrum was underclocked - the Z80A can run at 4MHz. Like many machines of the period, the 3.5MHz comes from the display timings (or very much appears to). There's a good diagram here: http://www.zxdesign.info/vidparam.shtml. Summary: 2 pixels/cycle makes 224 cycles per line; (224 cycles/line) * (312.5 lines/PAL frame) * (50 PAL frames/sec) = 3,500,000 (cycles/sec).

(I don't know if there was a 7MHz clock that was divided by 2, or what, or if the thing could genuinely produce 2 pixels per cycle.)

4MHz was somewhat high compared to the 6502-based systems that made up some of its competition, but for many operations the Z80 doesn't run terribly efficiently. Opcode fetch takes 4 cycles and memory read/write takes 3 cycles, making the memory bandwidth of a 4MHz Z80 about that of a slighty-more-than-1MHz 6502. (The 6502 would read or write 1 byte every cycle.) This downplays the value of the Z80's register set and 16-bit operations, though; 6502 zero page is a bit of a poor substitute in many cases, because you lose a cycle from having to read the address byte.

(Compare INC $xx - 5 x 6502 cycles, 2 x opcode, 1 x read, 1 x dummy, 1 x write - with - with INC r - 4 x Z80 cycles, all opcode fetch and then it's done. On the other hand, ADC A,n takes the Z80 8 cycles, because it has to read 2 opcode bytes - something the 6502 will get through in 2.)