Practical Makefiles, by example

Re:Practical Makefiles, by example by gshrikant on Thursday April 02, 2015 @02:26AM (#9308967)

Is anyone aware of the reasons for choosing the particular symbols that Make uses i.e. '@' (targets), '^' (list of dependencies) and '<' (first in the list of dependencies)?

I have admittedly limited experience with make and I always seem to forget what symbol stood for what. They don't seem to be particularly intuitive mnemonics to me.

For example, one could argue that '<' for target and '>' for dependencies would be a tad clearer.

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Re:Practical Makefiles, by example by mewo2 on Thursday April 02, 2015 @05:46AM (#9309558)

I always think of '^' and '<' as being arrows pointing at the relevant dependencies, i.e "that list of things up ^ there" or "that thing on the far left <". It can also help to think of '<' as being like a stdin redirect, so a simple rule might look like "myprog < $<".

I'm not sure what the deal is with '@' though.

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Re:Practical Makefiles, by example by sigjuice on Thursday April 02, 2015 @10:57AM (#9311048)

I have always thought of '@' as an archery target.

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