Re:Why Intel is adding instructions to speed up non-volatile...
by soamv on Thursday November 06, 2014 @04:28AM
(#8566352)
Well, this is about userspace access to nvram, with the nvram mapped as memory. It just so happens that cache management is one of the hard parts of doing that, so that's what these new instructions are for.
[ Parent
| on HN ]
There are no comments on this comment yet.