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Re:Disclosure of H/W prefetcher control on some Intel proces... by javert on Thursday October 16, 2014 @08:03PM (#8468640)
Was the fact that you can enable or disable these not publicly known before this article?
Re:Disclosure of H/W prefetcher control on some Intel proces... by sathvikl on Thursday October 16, 2014 @10:39PM (#8469156)
yes, since Nehalem it was not publicly disclosed. Only the BIOS writer guide had these details. The Model Specific Register address and its bit value settings were not published, not all BIOS implementations exposed the 4 h/w prefetchers. In some CPUs they stayed disabled that way which made debugging more difficult.
Re:Disclosure of H/W prefetcher control on some Intel proces... by colanderman on Thursday October 16, 2014 @08:41PM (#8468787)
Presumably disable. They are enabled by default, and the suggested use is to disable for more reliable benchmarking.
Re:Disclosure of H/W prefetcher control on some Intel proces... by x0x0 on Thursday October 16, 2014 @09:36PM (#8468958)
Unless you plan to run with these disabled, how would disabling them during benchmarking possibly improve the relevance of the benchmarks? And if the benchmarks aren't relevant, why benchmark?
Re:Disclosure of H/W prefetcher control on some Intel proces... by colanderman on Thursday October 16, 2014 @11:35PM (#8469317)
If, e.g., you're trying to benchmark the memory itself, and not the processor's prefetch algorithm.