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Re:Why the Z-80's data pins are scrambled by PhantomGremlin on Friday September 26, 2014 @11:41PM (#8375998)
In the "good old days" it was certainly possible to do board design using 2x or 4x sized Bishop Graphics tape for lines, vias, etc. You applied them to transparent mylar sheets corresponding to board layers.

But now, sheesh! You need to carefully constrain the PCB CAD program so that all the lines match to within 0.1" or less. And, as you mention, that's just the tip of the design iceberg.

It's no longer possible to layout computers at low cost in a garage. Oh, well. Now hipsters sit around in open offices in SOHO and create silly apps.

Re:Why the Z-80's data pins are scrambled by yuhong on Friday September 26, 2014 @11:45PM (#8376006)
http://electronics.stackexchange.com/questions/13372/how-to-...

Notice the reason why! In fact, I think the idea of a startup producing laptops targeted at developers has been mentioned before here on HN.

Re:Why the Z-80's data pins are scrambled by fnordfnordfnord on Saturday September 27, 2014 @12:59AM (#8376122)
Re:Why the Z-80's data pins are scrambled by yuhong on Saturday September 27, 2014 @01:49AM (#8376194)
Not the kind of laptop the link I posted is talking about, which is x86-based. And I found the HN comment where the idea was mentioned BTW: https://news.ycombinator.com/item?id=7079053