Re:Emulating a 6502 with cycle-perfect timing
by ChuckMcM on Thursday May 29, 2014 @01:24PM
(#7817378)
I think this is really awesome stuff. Now please someone turn this into a product. Take existing FPGAs and the synthesized hardware, and some place and route data, and generate cycle perfect simulations. If you do this, I can almost guarantee that you will be acquired by one of the big HDL companies, and you might even get to make a tool widely used and loved by EEs on the Internet everywhere. We've got spice online, we've got schematic capture online, now cycle accurate hardware simulation is the next target.
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Re:Emulating a 6502 with cycle-perfect timing
by OnACoffeeBreak on Thursday May 29, 2014 @01:45PM
(#7817521)
> Take existing FPGAs and the synthesized hardware, and some place and route data, and generate cycle perfect simulations.
> now cycle accurate hardware simulation is the next target.
Can you clarify this? Do you mean, take a 6502 HDL model, place and route it to an FPGA and back-annotate the PaR data into a simulation testbench that runs in an online simulator?
Re:Emulating a 6502 with cycle-perfect timing
by ChuckMcM on Thursday May 29, 2014 @02:03PM
(#7817640)
Yes. (could be an RTL model, something post HDL) You have that?
Re:Emulating a 6502 with cycle-perfect timing
by timthorn on Thursday May 29, 2014 @04:41PM
(#7818488)
Cycle accurate models have been a product for a long time - I was writing them for a job over a decade ago.
Don't confuse them with timing accurate models, which also stimulate where in the clock cycle levels change. That's the class of model you would be interested in place and route data for.
Re:Emulating a 6502 with cycle-perfect timing
by ChuckMcM on Thursday May 29, 2014 @11:38PM
(#7820137)
I agree, I've got a copy of ModelSim which I use for that, I was wondering if someone could create a 'simulator as a service' using JS code in a browser. If you can take the RTL description of the synthesized hardware and create a model that runs in a browser, then you can have your browser do a quick check of your HDL while you are working. People compile so many things into JS these days, why not hardware?