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Re:How many 32-bit RISC CPUs fit in an FPGA? Now vs. 1995? by DigitalJack on Thursday March 27, 2014 @08:04PM (#7484368)
Wow. That really says something (to me anyway), begging to go back to Verilog.

There are a lot of pain points in the HDLs, but it seems like Verilog has more than the others.

I saw someone working on a clojure HDL, I think it might have compiled down to or emitted Verilog. I thought it was more confusing than the HDLs to begin with, but depending on one's background it might make more sense.

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