Yes, but you depend less on bugs caused by levels of abstraction below your code, such as runtimes, OSes etc.

Between writing and formally verifying HDL, logic synthesis (often using third-party or vendor-provided blocks or soft IP, mind you), behavioral and logic simulation (software!), layout, MDP, and building test harnesses that actually test the final hardware, I would actually trust a lower-level language compiled using a well-known compiler and running on a small RTOS on a proven CPU more than I'd trust a new design synthesized into FPGA or especially ASIC form.

Only a win if you have some reason to believe your code will be any less buggy when you inevitably start on your own ad-hoc reimplementations of those abstractions.