Target specific variables do this job:
rule1 : FOO:=1
rule1 :
echo $(FOO)
rule2 : FOO:=2
rule2 :
echo $(FOO)
Re:Why Use Make
by SomeCallMeTim on Friday March 01, 2013 @01:50PM
(#5306121)
Interesting. Didn't know this trick.
Turns out it wouldn't work for the usage pattern I needed (my example was simplified -- typically the variable settings would all happen in another file, and they couldn't happen on a target line because there wouldn't be a single target to use, in addition to just being ugly for that use), but it's good to know.
Sorry, but I wasn't messing up those two. That's Makefile 101 knowledge; I'm talking about crazy advanced stuff, where := doesn't work the way you expect.
Even := doesn't do what you want if, after the Makefile has been loaded and you've used := three times on the same variable, ALL the instances of that variable are replaced by the last assignment. Here's an example:
make rule1 and make rule2 both echo 2. $(FOO) is evaluated in both cases AFTER the Makefile is loaded.