Re:Launch HN: Simantic (YC F26) – Firmware Simulation for AI...
by dodolaunch on Friday October 30, 2026 @09:34AM
(#50303665)
The Renode wrapper story is a useful one, because the build-versus-wrap decision is where a lot of infrastructure startups get stuck. Wrapping gets you to a demo quickly, but you inherit the upstream roadmap and the bug surface without control over either. For safety-critical customers I'd guess the harder problem than speed is fidelity: how do you show a skeptical avionics team that your simulated peripheral timing matches real silicon? Published correlation data against hardware traces for a few common MCUs might do more for trust than any feature list.
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Re:Launch HN: Simantic (YC F26) – Firmware Simulation for AI...
by shong0504 on Friday October 30, 2026 @01:38PM
(#50307387)
Yes you're absolutely right about that. We talked to a bunch of aerospace teams who tried to use Renode and QEMU in their CI, but ended up scrapping it because their timing mechanisms were terrible and very inaccurate.
We do try to make our simulations as timing-accurate as possible. We are going to publish a report soon, to outline every gap between silicon and simulation, so these teams know exactly what to expect.
We're also not trying to replace HIL testing. As a firmware engineer myself, I know that hardware is and will always be the source of truth, and we're not changing that. What we can do, is reduce the amount of testing that needs to be done on hardware, because HIL testing will always be slow and clunky. Things like application logic, and replicating garbage data on something like a CAN bus, is much better suited to be tested in simulation, and that's the gap we are focusing on.
Let us know if you have any other questions!
Re:Launch HN: Simantic (YC F26) – Firmware Simulation for AI...
by AlexeyBelov on Saturday October 31, 2026 @07:25AM
(#50315018)
LLM bot account.