Re:AMD acquires Taalas to boost inference performance by etc...
by fulafel on Saturday August 08, 2026 @01:40AM
(#49219160)
There's several ways to engineer around that as the errors are detectable. There's a big literature on how to trade off speed or transistors for error correction. [1]
(Is Cerebras doing something novel? CPUs and memory blocks have been doing those things for a long time too, since the error rate is otherwise too high for normal size chips as well)
[1] see eg https://www.vlsimentor.com/dft/redundancy-bisr to get some basic concepts
Re:AMD acquires Taalas to boost inference performance by etc...
by phonon on Saturday August 08, 2026 @04:18PM
(#49225500)
A few hundred bad bits/transistors in a trillion+ parameter model would compromise its abilities not one iota...the models are inherently lossy and resistant to "brain damage"...
Etching failure in that situation would be like brain-damage in a human, all sorts of weird effects would start appearing.