Re:IBM Debuts First Sub-1 Nanometer Chip Technology
by measurablefunc on Thursday June 25, 2026 @05:49PM
(#48679669)
In any case, I got the answer from the AI I was looking for & it makes sense. You can try to map the volumetric density to areal density but the mapping is not canonical so it doesn't say anything about the physical reality of actual transistor density since the reality is that it is a volumetric measure that gets fudged for marketing purposes.
Re:IBM Debuts First Sub-1 Nanometer Chip Technology
by roetlich on Thursday June 25, 2026 @06:29PM
(#48680031)
Well, this seems like a very dangerous way of using AI. If you keep pushing until you get back an answer that makes sense to you, you might just get your own believes fed back to you.
Re:IBM Debuts First Sub-1 Nanometer Chip Technology
by measurablefunc on Thursday June 25, 2026 @07:09PM
(#48680365)
Fortunately for you I put even less weight on opinions of internet strangers so there is no danger here for anyone.
"Planar" and "3D" in this context refers to the shape of the transistors themselves. In a planar transistor the functional structure is spread out in the area, like this: https://en.wikipedia.org/wiki/File:MOSFET_functioning_body.s... while 3D transistors spread into the volume: https://en.wikipedia.org/wiki/Multigate_device#/media/File:D...
However the active devices are still just one layer. This isn't like 3D NAND where you actually have transistors on top of each other. So the comparison only considers the area for both kinds of transistors.