OpenAI unveils its first custom chip, built by Broadcom

Re:OpenAI unveils its first custom chip, built by Broadcom by cpldcpu on Wednesday June 24, 2026 @03:28PM (#48664609)

I had Opus 4.5 design an LLM inference engine in verilog, including firmware and automated verification a while ago: https://github.com/cpldcpu/smollm.c

It's of course far from optical. But lowering the implementation through the abstraction levels turned out to be extremely powerful.

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Re:OpenAI unveils its first custom chip, built by Broadcom by smetannik on Wednesday June 24, 2026 @03:39PM (#48664723)

Can you suggest some tutorials for Verilog and FPGAs in general?

I have a spare Tang Nano 9k but I don't feel confident about blindly asking Claude to vibecode me a solution and still would like to have at-least a basic level of understanding.

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Re:OpenAI unveils its first custom chip, built by Broadcom by jared0x90 on Wednesday June 24, 2026 @04:59PM (#48665556)

the hdlbits course is really good imo

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Re:OpenAI unveils its first custom chip, built by Broadcom by cpldcpu on Wednesday June 24, 2026 @06:00PM (#48666124)

hm.. has been quite a while for me. The good thing about the Tang Nano is that it is supported by the Yosys open source toolchain. There are quite a few resources on the web when you search for the combination.

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