Re:Optimizing a Lock-Free Ring Buffer
by pjdesno on Friday March 27, 2026 @12:17PM
(#47544690)
What's not guaranteed for "normal" loads and stores on many architectures is the order in which writes become visible to other CPU cores.
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Right, that's what the various memory ordering constants are for in C++ atomics, and other languages will likely have an equivalent. On such architectures, those will emit special instructions or barriers.