Re:How Taalas "prints" LLM onto a chip?
by ivan_gammel on Sunday February 22, 2026 @03:24PM
(#47114304)
Why are you thinking about phones specifically? Most heavy users are on laptops and workstations. On smartphones there might be a few more innovations necessary (low latency AI computing on the edge?)
Re:How Taalas "prints" LLM onto a chip?
by bigyabai on Sunday February 22, 2026 @04:48PM
(#47115075)
Many laptops and workstations also fell for the NPU meme, which in retrospect was a mistake compared to reworking your GPU architecture. Those NPUs are all dark silicon now, just like these Taalas chips will be in 12-24 months.
Dedicated inference ASICs are a dead end. You can't reprogram them, you can't finetune them, and they won't keep any of their resale value. Outside cruise missiles it's hard to imagine where such a disposable technology would be desirable.
Re:How Taalas "prints" LLM onto a chip?
by ivan_gammel on Sunday February 22, 2026 @05:56PM
(#47115707)
Most consumers do not care about reprogramming or fine-tuning and have no idea what NPU is. For many (including specifically those who still mourn dead AI companions, killed by 4o switch) the long term stability is much more important than benchmark performance of evergreen frontier model. If Taalas can produce a good hardwired model at scale at consumer market price point, a lot of people will just drop their AI subscriptions.
Re:How Taalas "prints" LLM onto a chip?
by bigyabai on Sunday February 22, 2026 @06:59PM
(#47116208)
> a lot of people will just drop their AI subscriptions.
For a 2.5 kW Server? I don't see it happening, your money and electricity is better spent on CUDA compute.
Re:How Taalas "prints" LLM onto a chip?
by ivan_gammel on Monday February 23, 2026 @05:20AM
(#47120370)
>For a 2.5 kW Server?
I don’t see any reason why this should not drop to 100-300W at peak with maybe 100W*h of daily usage on smartphones.
The A18 iPhone chip has 15b transistors for the GPU and CPU; the Taalas ASIC has 53b transistors dedicated to inference alone. If it's anything like NPUs, almost all vendors will bypass the baked-in silicon to use GPU acceleration past a certain point. It makes much more sense to ship a CUDA-style flexible GPGPU architecture.