Writing a RISC-V Emulator in Rust

Re:Writing a RISC-V Emulator in Rust by pezezin on Sunday October 26, 2025 @08:16PM (#45716175)

SPARC, MIPS, Alpha and others are irrelevant nowadays.

Regarding POWER, the few distros that support it, only support the little-endian variant. Ditto for ARM.

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Re:Writing a RISC-V Emulator in Rust by hajile on Monday October 27, 2025 @01:45PM (#45724095)

There are almost certainly more MIPS chips in the world than x86.

Saying "you can have big-endian in your ISA, but we won't be supporting it" is very different from railing on about the ISA having big-endian at all.

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Re:Writing a RISC-V Emulator in Rust by pezezin on Monday October 27, 2025 @08:50PM (#45728156)

Is that so? I know that MIPS used to be very popular for embedded devices, especially routers and switches, but it seems that everything has moved to ARM.

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