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A comment on Designing a Low Latency 10G Ethernet Core (2023). Parent comment

Re:Designing a Low Latency 10G Ethernet Core (2023) by brewmarche on Thursday October 09, 2025 @05:13PM (#45533158)
So, if I know the destination addresses on each port in advance I can program it to behave like an L2 switch (with proper multicast even), and I can use code to reprogram it whenever the traffic pattern changes?
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Re:Designing a Low Latency 10G Ethernet Core (2023) by darrin on Friday October 10, 2025 @07:58AM (#45537914)
The L1 path can't do any address matching and you can't overlap sources - like Ghostbusters, no crossing the streams. You can source port 1 to ports 2-4 (multicast, but static and unidirectional) and you can change a bidir connection between pairs of ports. The signal gets replicated regardless of what's in the frame. It wouldn't be practical to make it behave quite like an L2 switch.
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Re:Designing a Low Latency 10G Ethernet Core (2023) by brewmarche on Friday October 10, 2025 @08:49AM (#45538406)
Apologies, my post was not precise enough, but I think I got it.

> It wouldn't be practical to make it behave quite like an L2 switch.

What are typical configuration? If you’re allowed to talk about it.

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