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A comment on 86 GB/s bitpacking with ARM SIMD (single thread). Parent comment

Re:86 GB/s bitpacking with ARM SIMD (single thread) by camel-cdr on Sunday October 05, 2025 @03:35PM (#45484505)
Not sure in which context this is used, but you can do -1 << k in most ISAs but that still requires a bit-not. But if you want to use the value in a bitwise instruction, then there are often variants that can invert the input operand.

E.g. in RVV instead of vand.vv(a, vadd.vi(vsll.vv(1,k),-1)) you could do vandn.vv(vsll.vv(-1,k))

AVX-512 can do this with any binary or ternary bitwise logic function via vpternlog

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Re:86 GB/s bitpacking with ARM SIMD (single thread) by Sesse__ on Sunday October 05, 2025 @05:18PM (#45485368)
I don't know either; I was talking about the lack of PMOVMSKB in NEON and then the comment I replied to started talking about (1 << k) - 1 not being a single instruction sucks. Which I don't think it is in any non-NEON set either.
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