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Re:AMD Claims Arm ISA Doesn't Offer Efficiency Advantage ove... by adgjlsfhk1 on Tuesday September 09, 2025 @03:34PM (#45187554)
> Floating point arithmetic spends three bits in the instruction encoding to support static rounding modes.

IMO this is way better than the alternative in x86 and ARM. The reason no one deals with rounding modes is because changing the mode is really slow and you always need to change it back or else everything breaks. Being able to do it in the instruction allows you to do operations with non-standard modes much more simply. For example, round-to-nearest-ties-to-odd can be incredibly useful to prevent double rounding.

Re:AMD Claims Arm ISA Doesn't Offer Efficiency Advantage ove... by brandmeyer on Saturday September 13, 2025 @11:14AM (#45232747)
You can't even express static rounding in C. You can't even express them in the LLVM language-independent IR. Any attempt to use the static rounding modes will necessarily involve intrinsics and/or assembly.
Re:AMD Claims Arm ISA Doesn't Offer Efficiency Advantage ove... by adgjlsfhk1 on Monday September 15, 2025 @12:18AM (#45246060)
There's a chicken and egg problem here. C can't express this, and there's no LLVM IR for this because up till now, everyone has had global registers for configuring fpus which make them slow and useless.

C probably won't support this for decades (ISO tends to be pretty conservative), but other languages (e.g Rust/Julia) might support this soonish (especially if LLVM adds support)