AMD Claims Arm ISA Doesn't Offer Efficiency Advantage over x86

Re:AMD Claims Arm ISA Doesn't Offer Efficiency Advantage ove... by happycube on Monday September 08, 2025 @06:15PM (#45174747)

There's a critical instruction for Objective C handling (I forget exactly what it is) but it's faster than intel's chips even in Rosetta 2's x86 emulation.

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Re:AMD Claims Arm ISA Doesn't Offer Efficiency Advantage ove... by wvenable on Monday September 08, 2025 @07:23PM (#45175434)

I believe it's the `lock xadd` instruction. It's faster when combined with x86 Total Store Ordering mode that the Rosetta emulation runs under.

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Re:AMD Claims Arm ISA Doesn't Offer Efficiency Advantage ove... by saagarjha on Monday September 08, 2025 @09:11PM (#45176214)

Looking at objc_retain apparently it's a lock cmpxchg these days

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