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A comment on FFmpeg Assembly Language Lessons. Parent comment
In the timespan of a L1 miss, the CPU could execute several dozen instructions assuming a L2 hit, hundreds if it needs to go to L3.
No wonder optimizing memory access can work wonders.
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In the timespan of a L1 miss, the CPU could execute several dozen instructions assuming a L2 hit, hundreds if it needs to go to L3.
No wonder optimizing memory access can work wonders.