Disks lie. And the controllers that run them are partners in crime.

Re:Disks lie. And the controllers that run them are partners... by spatular on Saturday September 08, 2012 @11:25AM (#4493108)

I doubt that you could use NAND Flash as RAM substitute as it is right now. Basically it's a block device with page size about 8KB and erase block ~ 2MB. Data could be read and written only in pages, in-chip page load times are on the order of 100us, page write 1ms, block erase -- 5ms, and it takes about 100us to transfer page data in either direction. So, random read/write latencies are 10^2 / 10^1 times lower than HDD's, but still about 10^3 / 10^4 times larger than DRAM's. I guess internal architecture could be redisigned to reduce block sizes and allow parallel operations inside a sigle chip, but it's unclear how much it will affect density and price.

But it would be useful to put NAND controller closer to CPU, remove block device emulation layer and let OS do wear-leveling and block allocation. We could get high-performance swap or put there specialized MTD filesystems like UBIFS.

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Re:Disks lie. And the controllers that run them are partners... by ChuckMcM on Saturday September 08, 2012 @11:35AM (#4493122)

Not familiar with 'drum' memory I take it? Back in the way back time a bunch of read/write heads all sitting long a drum which was spinning underneath them. It had some similarities to flash, no seek time, you just picked the head to read or write, if you wrote you wrote the entire track because there wasn't an index (usually). Cool stuff.

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