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Re:SRAM Has No Chill: Exploiting Power Domain Separation to ... by ajb on Friday July 25, 2025 @11:11PM (#44691007)
Chips often have multiple VCC pins exactly because otherwise there is voltage drop across the chip. This is a hard problem. For chips where this is a security issue, I guess one answer may be to do voltage distribution on the interposer, since fewer attackers can deal with a raw die.
Re:SRAM Has No Chill: Exploiting Power Domain Separation to ... by Scoundreller on Friday July 25, 2025 @11:34PM (#44691101)
If I understood the article correctly; the different on-chip elements have separate power supplies.

Makes sense: you might want to turn off the CPU but keep the SRAM/cache/etc running for hibernation, and that’s controlled externally for some reason (?)

Re:SRAM Has No Chill: Exploiting Power Domain Separation to ... by Tuna-Fish on Saturday July 26, 2025 @07:45AM (#44693327)
It's not normally controlled externally, but the power comes from an external source, and as the different parts of the chip want different voltages, they connect to different power sources. If you control everything outside the chip and cut the supply to parts of it, there is little that the chip can do about it, even if it normally controls distribution.
Re:SRAM Has No Chill: Exploiting Power Domain Separation to ... by ajb on Saturday July 26, 2025 @08:37AM (#44693663)
You're right, that was the hole here. The reply by Tuna-Fish gives the correct reason for this setup (different voltages). The actual power converter usually needs at least an off-chip capacitor, even if the logic is integrated, because that's too large to be cost-efficient in silicon; so there might be an opening even if as much as possible was integrated - haven't thought that through though.
Re:SRAM Has No Chill: Exploiting Power Domain Separation to ... by nine_k on Tuesday July 29, 2025 @03:05AM (#44720044)
Put a pair of large MOSFETs at the power line that leads to the SRAM on the crystal; force-connect it to ground on reset or CPU power-up.